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From Motorola 68000 Homebrew Computer Project
- 21:57, 16 March 2011 Hardware:Expansion Bus (hist) [417 bytes] Admin (talk | contribs) (Created page with "Currently I am planning on using Eurocard (DIN 41612) connections for the backplane for the main board and expansion boards. {| border="1" !colspan="2"|Eurocard Connector |- |al...")
- 08:29, 14 March 2011 Schematic:MFP (hist) [104 bytes] Admin (talk | contribs) (Created page with "Here is my WIP memory decoder showing flash ICs and one SRAM. There will be a total of 6 SRAMS for a total of 12MB RAM. SRAM0-SRAM5 will be wired exactly the same way execpt diff...")
- 07:00, 11 March 2011 Schematic:Reset Circuit (hist) [170 bytes] Admin (talk | contribs) (Created page with "This schematic was found on the internet but I don't really see a reason to change it. I may use a MAX283 instead though since it has watchdog input. Image:reset.gif")
- 06:01, 11 March 2011 Schematic:CPU, Memory, and Main Memory Decoder (hist) [623 bytes] Admin (talk | contribs) (Created page with "Here is my WIP memory decoder showing flash ICs and one SRAM. There will be a total of 6 SRAMS for a total of 12MB RAM. SRAM0-SRAM5 will be wired exactly the same way execpt diff...")
- 00:21, 10 March 2011 Software:OS (hist) [1,039 bytes] Admin (talk | contribs) (Created page with "I plan on writing a basic operating system called ZeDOS for the computer. The name ZeDOS comes from the OS I made for my old Z80 system and the 68000 will be ported and expanded ...")
- 23:38, 9 March 2011 Software:libc (hist) [727 bytes] Admin (talk | contribs) (Created page with "We'll be needing a libc and I've rounded up a few candidates. libc will be statically linked initially until shared libraries are implemented; that is something to keep in mind a...")
- 19:02, 9 March 2011 Hardware:Schematic Busses (hist) [2,472 bytes] Admin (talk | contribs) (Created page with "In the schemtics, you will see several busses. They are described here: {| border="1" !colspan="2"|Busses |- !Name||Description |- |align="center"|ADDR||Address Bus (Numbered as...")
- 08:48, 9 March 2011 Hardware:Memory Map (hist) [1,919 bytes] Admin (talk | contribs) (Created page with "The 16MB of address space will be broken up into 8 2MB chunks by a 74LS138 3-to-8 decoder. 0MB: 0x00000000 - 0x000FFFFF ROM 1 MB 1MB: 0x00100000 - 0x001FFFFF Reserved 1 MB, po...")
- 08:42, 9 March 2011 Hardware:RAM (hist) [252 bytes] Admin (talk | contribs) (Created page with "RAM will be made up of 6 1Mx16-bit (2MB) SRAM chips. This is one of my few departures into SMT territory as these will be TSOP-1 48-pin ICs. Sorry, but DIP/PLCC SRAM is waaay to...")
- 08:39, 9 March 2011 Hardware:ROM (hist) [212 bytes] Admin (talk | contribs) (Created page with "1MB of ROM will be provided by 2 512x8-bit FLASH chips interleaved even/odd with the UDS/LDS signals from the CPU. Flash chips will be: SST39SF040 or compatible.")
- 08:34, 9 March 2011 Hardware:Other ICs (hist) [279 bytes] Admin (talk | contribs) (Created page with "68681 DUART (Dual UART + 8-bit GPIO) Datasheet 68901 Multi-Function Peripheral (MFP) (16 source interrupt controller, 1x UART/USRT, 4x timers, 8-bit GPIO) [[M...")
- 07:07, 9 March 2011 Hardware:CPU (hist) [937 bytes] Admin (talk | contribs) (Created page with "The Motorola 68000 CPU was released in 1979. It has a 32-bit instruction set and registers, with a 24-bit address bus and 16-bit data bus. More general information on this proces...")
